Tag: paged memory
Why I owe @slugonamission a (or several) large drink(s)
I have been struggling with a problem with my Microblaze simulation on OVPsim all week. I have been trying to make a start on implementing a simple demand paging system and to trigger the hardware exception that the Microblaze CPU manual says should happen when you either try to read from a mapped page that…
Which bit of a 4k page does your program use?
This follows on from the previous post – here are the plots. These are based on a run of the PARSEC benchmark suite x264 program – encoding 32 frames of video using 18 threads – 16 worker threads: the plots show how often each 16 byte “line” is used – whether as an instruction is…
Looks like one hope/theory knocked on the head
Now I have mapped the speed of OPT and LRU using a traditional two level memory hierarchy, my task is to find something better that might make NoC a more viable computing platform. One thought that occurred to me was that the preference of C and similar languages for page aligned memory in certain situations…