Tag: Microblaze
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The agony and the ecstasy of debugging
View image | gettyimages.com If you have ever written a computer program with any degree of seriousness then you will know the feeling: your heart sinking as you realise what you thought was a perfectly good piece of code has a bug somewhere less than obvious. In my case this has happened twice in a…
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Chase down that bug
If there are rules for software development, one of them should be never let a bug go unsquashed. This has been demonstrated to me again this week – when I had a bug in some Microblaze interrupt code. I realised I no longer needed to use the code and then puzzled over whether to find…
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Hard fault count drives performance
Just to emphasise how hard faults are determining for performance – here is a plot of hard faults versus page count for the same application mentioned in the previous post. The pattern is very similar, though it should be noted that increasing the page count does still keep the fault count coming down at the…
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Squashing the LRU bug
Just for once I did not rush to an online forum and say I had found a bug in a product – and I was right not too. Having tried three different cross compiler toolchains I convinced myself that the issue was plainly neither compiler (or, to be more accurate in this case, assembler) output…
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Curiouser and curiouser – the case of the LRU bug
My LRU queue bug is continuing to puzzle me – and it’s not as simple as a data misalignment. In fact it does not appear to be a data misalignment issue at all: before I was trapping a lot of hardware exceptions under that header because it was a common fault when I got the…
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LRU queue strangeness
For the last week or so I have been writing and then debugging (and so mainly debugging) a least-recently-used (LRU) page replacement system on my Microblaze simulation. Perhaps I shouldn’t have bothered – I had a working first-in-first-out (FIFO) system after all. But no one seriously uses FIFO, so I had to write some LRU…
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Simulating global and local memory on OVP
Had a good meeting with my PhD supervisor today: he was in London – I didn’t have to make a flying visit to York. So the next steps with my OVPsim Microblaze code is to model global and local memory – by default OVPsim treats all memory as local, mapping the full 32-bit address space…
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Picking which page to remove
I have now written some very basic but functional paging code for the Microblaze but have realised I am, essentially, going to have to start a lot of it again. The Microblaze puts page tables firmly under software control and its memory management unit (MMU) concentrates on managing page references through its translation lookaside buffers…
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Why I owe @slugonamission a (or several) large drink(s)
I have been struggling with a problem with my Microblaze simulation on OVPsim all week. I have been trying to make a start on implementing a simple demand paging system and to trigger the hardware exception that the Microblaze CPU manual says should happen when you either try to read from a mapped page that…
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Latest Microblaze puzzle
Having successfully written a couple of simple virtual memory mappings I now want to write the exception handling code that will allow me to swap mappings in and out – so I did this: I expected that the marked line would raise a hardware exception as a TLB miss and I’d be taken to the…
cartesian product ... stuff about computing mostly 