Had a good discussion with my supervisor today – he essentially said, in terms, “expect to produce nonsense for 18 months” (meaning experimental results which seem not so useful). This was helpful as it made me get my worries about the last two weeks of tinkering on the edges of building the first “experiment” – a logical model of a NoC – into perspective.
The work goes on.
(And a new book arrived – Using OpenMP: Portable Shared Memory Parallel Programming – having consciously avoided “middleware” when writing my QD I decided I did actually need to know about it after all.)
- Virtual memory and a new operating system (cartesianproduct.wordpress.com)
- Comparison of Network-on-Chip and Buses (mdafzal.wordpress.com)
- A regular but non-symmetric grid (cartesianproduct.wordpress.com)
- Intel prepares to launch chip with scores of computing brains (venturebeat.com)
- Intel Research Chip Advances ‘Era Of Tera’ (perelmanfh.wordpress.com)
- University of Houston Joins the OpenMP Effort (sys-con.com)
- Georg Hager’s Blog: Intel vs. GCC for the OpenMP vector triad: Barrier shootout! (eklausmeier.wordpress.com)